1. Field of the Invention
The present invention relates to a projection exposure system and method for a semiconductor wafer, and further relates to a semiconductor device manufactured using the above system or method. More specifically, the present invention relates to an improvement in exposure focusing and leveling, of the step and scan exposure system and method.
2. Background Art
Referring to FIG. 1 and FIG. 2(a) to FIG. 2(c), a description will be made of a step and scan exposure system and method, or a slit scan-type projection exposure system and method, to which the invention is directed (this type of apparatus will be hereinafter referred to as "scan-type stepper" where appropriate) and, particularly, to an example of how focusing and leveling are performed in the system and method.
FIG. 1 shows the configuration of a scan-type stepper. FIG. 2(a) shows a slit-like exposure area projected onto the wafer, and FIG. 2(b) and FIG. 2(c) show pattern forming plates of an illumination-side and a reception-side for an auto-focus function, respectively.
The principle of operation of the scan-type stepper will be described below. A pattern on a reticle 2 is projected onto a semiconductor wafer 8 in a slit-like exposure area 7, that is formed by illumination light, emitted from an illumination system 1 and passed through a projection optical system 6. FIG. 2(a) shows a slit-like exposure area 7 (or a slit-like exposure field) formed on the semiconductor wafer 8.
The entire exposure area of the wafer 8 is exposed by moving or scanning the reticle 2, mounted on a reticle stage 3, and the wafer 8, mounted on a wafer-side XY stage 11, in opposite directions. In this operation, the reticle stage 3 and the wafer-side XY stage 11 are properly synchronized with each other in terms of scanning speeds, alignment, etc., by a main controller 16 via a reticle stage controller 13, and a wafer-side XYZ stage controller 15.
Further, in the above operation, a Z position and an inclination of the wafer 8 are measured by a focusing and leveling sensor system 17 to 27 (described later in detail), and a Z stage wafer position detector 14. The signals are input to the main controller 16. The main controller 16 controls the wafer Z stage 12, via the wafer XYZ stage controller 15, so that the exposure surface of the wafer 8 is positioned at the image surface of the slit-like exposure area 7, that is formed by the projection optical system 6.
Next, the principle of operation of the focusing and leveling sensor system 17 to 27 and the wafer Z stage position detector 14 will be described. Illumination light, that is different from exposure light, and does not cause a chemical change in a photoresist formed on the wafer 8, is introduced from an illumination optical system (not shown) via an optical fiber 17. The illumination emitted from the optical fiber 17 is applied to a pattern forming plate 19 of the illumination-side, via a condenser lens 18. FIG. 2(b) shows the shape of the pattern forming plate 19 of the illumination-side. The illumination light passes through a plurality of openings formed in the pattern forming plate 19 of the illumination-side.
Returning to FIG. 1, the illumination light that has passed through the pattern forming plate 19 of the illumination-side, is projected onto the exposure surface of the wafer 8 via a lens 20, a mirror 21, and a projection objective lens 22. As a result, an image of a pattern, on the pattern forming plate 19 of the illumination-side, is formed as focus sense areas on the exposure surface of the wafer 8 in the inclined pattern. FIG. 2(a) shows a state where a plurality of focus sense areas F1 to Fn are arranged in the slit-like exposure area 7.
Returning to FIG. 1, the illumination light reflected by the wafer 8 is projected onto photodetecting surfaces of photodetectors 27, via a condensing objective lens 23, a mirror 24, an imaging lens 25, and a pattern plate 26 of the reception-side. FIG. 2(c) shows the shape of the pattern plate 26 of the reception-side, which is the same as that of the pattern plate 19 of the illumination side.
Returning to FIG. 1, an image of the pattern on the pattern forming plate 19 of the illumination-side is formed on the photodetecting surfaces of the photodetectors 27. If the Z position of the wafer 8 is varied, the illumination light reflected by the wafer 8 is shifted in the X direction on the pattern plate 26 of the reception-side. As a result, the quantity of light beam that passes through the pattern plate 26 of the reception-side and reaches the photodetectors 27, varies. Thus, the Z position of the wafer 8 is converted into the position in the X direction, on the pattern plate 26 of the reception-side, and light quantity on the photodetectors 27. The light quantity is further converted into a voltage through current to voltage conversion, and supplied to the Z stage wafer position detector 14 as a focus signal. The wafer-side Z stage position detector 14 performs a computation on the focus signal that is received from each photodetector 27, and supplies a resulting signal to the main controller 16.
Reference numeral 4 denotes a reticle stage interferometer mirror. Reference numeral 5 denotes a reticle stage interferometer. Reference numeral 9 denotes a wafer stage interferometer mirror. Reference numeral 10 denotes a wafer stage interferometer.
Next, the conventional method of signal processing will be described. FIG. 11(a) to FIG. 11(c) illustrate a state of focusing and leveling on a semiconductor chip in a conventional exposing method of a scan-type stepper. Consider an exposure area in a semiconductor chip, a memory-incorporated logic, for example, having a pattern layout shown in FIG. 11(a). In an auto-focusing system of the scan-type stepper, focus sense areas F1 to Fn are formed perpendicularly to a scanning direction as shown in FIG. 11(a). The plurality of photodetectors 27 (see FIG. 2(c)); (hereinafter referred to as focus sensors AF1 to AFn where appropriate) corresponding to the respective focus sense areas F1 to Fn, perform sensing along the scanning direction at the time of the exposure or prior to the exposure.
Conventionally, auto-focusing is performed by using a signal, such as an average value; (.SIGMA.SFn)/n of the focus signals SF1 to SFn from all the focus sensors AF1-AFn, for instance. Namely, the wafer-side XY stage 11, on which the wafer 8 is absorbed, and the wafer-side Z stage 12, are vertically moved including a leveling correction or inclination correction.
FIG. 11(b) and FIG. 11(c) illustrate states of focusing and leveling obtained on a semiconductor wafer, or more specifically a semiconductor chip, by the above-described conventional auto-scan method. FIG. 11(a) shows regions-1 and regions-2 having a level difference in between on the semiconductor chip surface and an arrangement of focus sense areas F1 to Fn formed on those regions.
FIG. 11(b) and FIG. 11(c) show leveling states in cases where a line A1-B1 or A2-B2 in FIG. 11(a) are illuminated, respectively. Where a level difference exists in the direction perpendicular to the semiconductor chip scanning direction, i.e.: X direction, as in the case concerned, the focusing and leveling state on either the line A1-B1 or A2-B2 are such that defocusing of 1/2 of the level difference between the region-1 and the region-2 occurs. For example, if the level difference between the region-1 and the region-2 is 1 .mu.m, the defocusing amounts to 0.5 .mu.m, which is fatal to submicron lithography.
In exposing a semiconductor chip, it is not always the case that a region-1 (a memory region, for example) and a region-2 (a logic region, for example) are exposed in the same step. That is, a region-1 and a region-2 may be exposed by using different masks. When the semiconductor chip is exposed by a scan-type stepper in such a situation, auto-focusing of exposure may be performed separately on either region-1 or region-2 depending on each step.
Therefore, if regions on a chip to be subjected to auto-focusing can be designated by an exposure program for each step, the accuracy of the auto-focusing is improved, because the auto-focusing is not affected by level differences that are formed within regions irrelevant to each step. This method is effective particularly in a case where a semiconductor chip has large level differences and the depth of focus is small.
FIG. 12(a) to FIG. 12(c) illustrate states of focusing and leveling on another semiconductor chip having level differences by the conventional auto-scan method.
FIG. 12(a) shows a region-1 and a region-2 on a semiconductor chip surface having a level difference in a scanning direction, i.e.: Y direction, as indicated by an arrow in the drawing, and an arrangement of focus sense areas F1 to Fn formed on those regions. FIG. 12(b) and FIG. 12(c) show leveling states in cases where the chip surface is illuminated along the line A1-A2 or B1-B2 in FIG. 12(a), respectively.
In this case, when focusing is made on the line B1-B2 in the region-2, defocusing will not arise ideally, because the focus sense areas F1 to Fn are within the region-2 in the scanning direction, i.e.: Y direction, as shown in FIG. 12(c). However, if the chip surface has a level difference in the scanning direction, i.e.: Y direction, defocusing will arise along the line A1-A2 which is in the vicinity of the step edge as shown in FIG. 12(b).
The reason for the above will be explained below. In the auto-focus system of the conventional scan-type stepper, the focus sense areas F1 to Fn form angles of 45.degree. with the scanning direction. Each focus sense area F1 to Fn has a size of about 0.2 mm.times.2.0 mm. Since the length of the focus sense areas F1 to Fn in the Y direction amounts to 1.4 mm (=2 mm/.sqroot.2), for instance, the focusing varies depending on the proportion of areas of the region-1 or region-2 on which the focus sense areas F1 to Fn extend.
Thus, defocusing occurs in an exposure in the vicinity of the boundary of the region-1 and region-2. For example, if the focus sense areas F1 to Fn extend in the region-1 and region-2 at a ratio of 1:2 and the level difference between those regions is 1 .mu.m, the defocusing amounts to 0.33 .mu.m, which is fatal to submicron lithography.
In exposing a semiconductor chip, the region-1, such as a memory area, and the region-2, such as a logic area, are not exposed in the same step. That is, region-1 and region-2 are exposed by using different masks. When this kind of semiconductor chip is exposed by a scan-type stepper, auto-focusing of the exposure may be performed separately on region-1 or region-2 depending on each step.
Therefore, if regions on a chip for auto-focusing can be reduced by improving the shape of the focus sense area, the accuracy of the auto-focusing is improved, because the auto-focusing is not affected by a level difference that is formed with regions irrelevant to each step. This method is effective particularly in a case where a semiconductor chip has large level differences and the depth of focus is small.